A Mixed-Mode ESD Simulation-Design Methodology

  

This project developed the first mixed-mode on-chip Electrostatic Discharge protection circuit simulation-design methodology, which enables ESD protection design prediction that replaces the traditional trial-&-error approach. The new methodology has been applied to many practical design projects at several companies.

  

REFERENCES:

·         A. Wang, et al, "A Novel Design Methodology Using Simulation for on-chip ESD Protection for Integrated Circuits", Proc. IEEE 5^th Intl. Conf. Solid-State & IC Technology, pp.509-512, 1998.

·         A. Wang and C. Tsay, " An on-Chip ESD Protection Circuit with Low Trigger-Voltage in BiCMOS Technology", IEEE J. Solid-State Circuits, Vol. 36, Number 1, pp.40-45, January 2001.